1. Field of Industry
The present invention relates to a writing circuit for a non-volatile memory such as a EPROM, EEPROM or flash memory.
2. Prior Art
FIG. 3 shows an example of a conventional writing circuit for non-volatile memory. Where a writing operation is performed on a memory transistor M10, the voltage of a control signal PGM is zero and the voltage of a control signal Vhv is 15 V. Since the power source voltage Vpp is 12 V, a NMOS transistor N11 is ON, a NMOS transistor N12 is OFF and a NMOS transistor N13 is ON. When a high-tension voltage is applied between terminals X and Y by address selection, the high-tension voltage is applied on the drain of the memory transistor M10 allowing a writing operation on the memory transistor M10 to be performed.
In the above-described conventional example, while the logical value "1" of the control signal PGM is 3 volts, that of the control signal Vhv is 15 volts. Accordingly, there has been a problem that two kinds of signal line voltages of 3 and 15 volts are necessary of voltages resulting in making the structure of the writing circuit in an integrated circuit complicated form the points of view of logic and layout.